1. Field of the invention
The present invention relates to a method for forming a barrier metal of a semiconductor device, particularly for forming a thick layer of TiSiN for a barrier metal having a low resistivity, using an atomic layer deposition (ALD) process.
2. Description of the Prior Art
Generally, with high integration of semiconductor devices, a design rule also becomes elaborated, and thus a size of a source/drain and a line width of a gate electrode of a MOS transistor and a line width of metallization become diminished. In particular, when the line width of the metallization is diminished, a size of a contact hole is also diminished, in which the contact hole is either for contacting the, gate electrode and the metallization or for contacting the source/drain and the metallization. If so, since contact resistances of the gate electrode and the metallization are increased, a resistance of the metallization is increased. Consequently, an operation speed of the semiconductor device is delayed. Nevertheless, it is true that a demand for speedup of the semiconductor device is more enhanced together with its high integration.
As one scheme for satisfying this demand, a layer of a high fusion metal, e.g. tungsten (W) has been recently used to reduce the contact resistance. Further, in order to reduce contact resistances of the tungsten layer and the contact region, a barrier metal is formed between the tungsten layer and the contact region. Among the barrier metals, it is a TiSiN layer that is considered as one having an excellent characteristic. However, the TiSiN layer is generally layered by a sputtering process, thus having a very high resistivity. As a result, the TiSiN layer has no choice but to have limited application as the barrier metal. Recently, in order to solve this problem, a method for forming a new layer of TiSiN has been proposed.
According to a conventional method for forming a layer of TiSiN, as shown in FIGS. 1 to 3, an insulating layer 11 is formed on a semiconductor substrate 10. Here, even though not shown in the drawings, it is apparent to those skilled in the art that, in order to define an active region of the substrate 10, a field oxide layer may be formed on a field region of the substrate 10, while a source/drain, a gate electrode, etc. of a transistor may be previously formed on the active region of the substrate 10. Subsequently, in order to expose a contact part (not shown) of the semiconductor substrate 10 using a photolithography process, the insulating layer 11 on the contact part of the semiconductor substrate 10 is etched to form a contact hole 12. Next, a precursor layer 13, for example a tetrakis dimethyl amido titanium (“TDMAT”) layer is layered inside the contact hole 12 and on the insulating layer 11 at a desired thickness. Then, the precursor layer 13 is plasma processed and transformed into a TiN layer 15. Finally, the surface of the TiN layer 15 is brought into a repetitive contact with a SiH4 gas using a chemical vapor deposition (CVD) process, so that the TiN layer 15 is transformed into a TiSiN layer 17.
However, it is difficult to perform thick deposition of the TiSiN layer 17. Further, because resistivity of the TiSiN layer 17 is rather high, the TiSiN layer 17 can be only used as the barrier metal within a limited range.
Meanwhile, U.S. Pat. No. 6,271,136, titled “MULTI-STEP PLASMA PROCESS FOR FORMING TiSiN BARRIER” and issued to TSMC Company of Tiwan, discloses a method for improving a TiSiN layer as a copper barrier metal by means of Metal Organic Chemical Vapor Deposition (MOCVD) and multi-step plasma process. However, the disclosed document does not offer a solution to form a TiSiN layer for a barrier metal having a low specific resistance and a thick thickness.